India Approves Three Bengaluru Chip Design Centres
The Design Linked Incentive grants target RISC-V processors, RF semiconductors and automotive-grade chips.
The India Semiconductor Mission has approved Design Linked Incentive (DLI) grants for three new chip design centres in Bengaluru's electronics cluster, to be set up over the next 18 months. Announced by the Ministry of Electronics and Information Technology, they are the eighth, ninth and tenth centres funded under the scheme.
Chip design is the engineering of integrated circuits before manufacturing; India is strong in design talent but still lacks large-scale fabrication.
Key Highlights
- Three new design centres approved under the DLI scheme.
- Focus areas: RISC-V processors, RF semiconductors, automotive-grade chips.
- DLI funds up to 50% of eligible spend over five years.
- Each centre commits to hiring at least 100 engineers in two years.
- Supports the goal of 85,000 trained chip engineers by 2030.
What the Centres Will Build
The first, from an IISc-researcher and deep-tech startup consortium, will design processors on the open-source RISC-V instruction set for industrial IoT, edge computing and digital public infrastructure.
The second, a joint venture between an Indian defence-electronics firm and a Taiwanese RF design house, will develop radio-frequency semiconductor IP for 5G small cells, military communications and satellite ground terminals — a segment where India has near-zero domestic design capability.
The third, backed by automotive OEMs and Tier-1 suppliers, will design automotive-grade chips meeting the AEC-Q100 reliability standard, addressing the import dependence exposed by the 2021-22 automotive chip shortage.
The three centres
| Centre | Focus |
|---|---|
| IISc + startup consortium | RISC-V processors for IoT and edge |
| Indian-Taiwanese JV | RF semiconductors for 5G, defence, satellites |
| Automotive consortium | Automotive-grade chips (AEC-Q100) |
Incentives and Talent
The DLI scheme funds up to 50 per cent of eligible expenditure over five years, capped at ₹15 crore for product design and ₹30 crore for chip design projects reaching tape-out. All three centres pledged to hire at least 100 engineers within two years.
Why It Matters
Chip design is growing fast in India, but the path to a full fabrication ecosystem remains long and capital-intensive. The government's push to attract fabs continues in advanced talks with two potential investors — an ambition tied to India's wider tech drive, including its 6G roadmap and buoyant deep-tech funding.
Frequently Asked Questions
What is the DLI scheme?
The Design Linked Incentive scheme funds up to 50% of eligible chip-design spend over five years.
What will the three centres design?
RISC-V processors, RF semiconductors, and automotive-grade integrated circuits.
Why is RF design significant?
India consumes vast RF components but has almost no domestic design capability.
Does this mean India will fabricate chips?
Not yet; these are design centres. Fab investments are still under negotiation.
How many engineers will be hired?
At least 100 per centre within two years, toward a 2030 goal of 85,000 chip engineers.
Sources
- Ministry of Electronics and Information Technology
- India Semiconductor Mission — DLI scheme